page 1 of 8 digital step attenuator case style: dg983-2 the big deal ? wideband, operates up to 4 ghz ? immune to latchup ? high ip3, 52 dbm product overview the dat-15r5a+ series of 50 ? digital step attenuators provides adjustable attenuation from 0 to 15.5 db in 0.5 db steps. the control is a 5-bit serial/parallel interface, and the attenuators operate with either single positive or dual (positive and negative) supply voltage. dat-15r5a+ series models are produced by a unique cmos process on silicon, offering the performance of gaas with the advantages of conventional cmos devices. feature advantages wideband operation, specifed from dc to 4.0 ghz can be used in multiple applications such as communications, satellite and defense, reducing part count. serial or parallel interface models available with serial or parallel interface mode to suit customer demand. good vswr, 1.2:1 typ. eases interfacing with adjacent components and results in low amplitude ripple. single positive supply models: (model suffxes: -sp+ and Cpp+) +2.3 to +3.6v use of single positive supply simplifes power supply design. an internal negative voltage generator supplies the desired negative voltage. single positive supply results in excellent spurious performance, -140 dbm typical. dual supply models: (model suffxes: -sn+ and Cpn+) +2.7 to +3.6v (positive) and -3.6 to -3.2v (negative) dual supply provides spurious-free operation. it also allows fast switching up to 1 mhz (vs. 25 khz for single supply). useable over a wide range of supply voltages, +2.3/2.7 to 5.2v wide range fo positive operating voltages allows the dat-15r5a+ series of models to be used in a wide range of applications. see application note an-70-006 for operation above +3.6v footprint compatible to dat-15r5-xx+ series (xx=sn/sp/pn/pp) can ft into existing footprint and provide improved performance. dat-15r5a+ series key features 50 ? 0 to 15.5 db, 0.5 db step dc to 4.0 ghz surface mount mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com
page 2 of 8 product features ? immune to latch up ? excellent accuracy, 0.1 db typ ? serial control interface ? low insertion loss ? high ip3, +52 dbm typ ? very low dc power consumption ? excellent return loss, 20 db typ ? small size 4.0 x 4.0 mm typical applications ? base station infrastructure ? portable wireless ? catv & dbs ? mmds & wireless lan ? wireless local loop ? unii & hiper lan ? power amplifer distortion canceling loops general description the DAT-15R5A-SP+ is a 50 ? digital step attenuator that provides adjustable attenuation of 0 to 15.5 db in 0.5 db steps. the control is a 5-bit serial interface, operating with a single (positive) supply voltage. dat- 15r5a-sp+ is produced by a unique cmos process on silicon, offering the performance of gaas with the advantages of conventional cmos devices. digital step attenuator 15.5 db, 0.5 db step 5 bit, serial control interface, single supply voltage 50 ? dc-4000 mhz simplifed schematic DAT-15R5A-SP+ case style: dg983-2 digital serial control rf input 8db 4db 2db 1db 0.5db rf out rev. c m164761 DAT-15R5A-SP+ rs/th/cp 150707 mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com +rohs compliant the +suffix identifies rohs compliance. see our web site for rohs compliance methodologies and qualifications
page 3 of 8 rf electrical specifcations (note1) , dc-4000 mhz, t amb =25c, v dd =+3v parameter freq. range (ghz) min. typ. max. units accuracy @ 0.5 db attenuation setting dc-1 0.03 0.1 db 1-2.4 0.05 0.15 2.4-4 0.07 0.2 accuracy @ 1 db attenuation setting dc-1 0.02 0.1 db 1-2.4 0.05 0.15 2.4-4 0.1 0.25 accuracy @ 2 db attenuation setting dc-1 0.05 0.15 db 1-2.4 0.15 0.25 2.4-4 0.15 0.35 accuracy @ 4 db attenuation setting dc-1 0.07 0.2 db 1-2.4 0.15 0.25 2.4-4 0.23 0.5 accuracy @ 8 db attenuation setting dc-1 0.03 0.2 db 1-2.4 0.15 0.5 2.4-4 0.6 0.8 insertion loss (note 2) @ all attenuator set to 0db dc-1 1.3 1.9 db 1-2.4 1.6 2.4 2.4-4 2.1 3.0 input ip3 (note 3) (at min. and max. attenuation) dc-4 +52 dbm input power @ 0.2db compression (note 3) (at min. and max. attenuation) dc-4 +24 dbm input operating power 10 khz to 50 mhz see fig. 1 dbm >50 mhz +24 vswr dc-1 1.2 1.5 :1 1-2.4 1.2 1.6 2.4-4 1.4 1.9 dc electrical specifcations parameter min. typ. max. units v dd dd switching specifcations parameter min. typ. max. units switching speed, 50% control to 0.5db of attenuation value 1.0 sec switching control frequency 25 khz 6. permanent damage may occur if any of these limits are exceeded. 7. operation between max operating and absolute max input power will result in reduced reliability. absolute maximum ratings (note6,7) parameter ratings operating temperature -40c to 105c storage temperature -65c to 150c v dd digital step attenuator DAT-15R5A-SP+ mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com
page 4 of 8 pin description pin confguration (top view) device marking mcl pin 1 index ds50 function pin number description n/c 1 not connected (notes 9) rf in 2 rf in port (note 1) data 3 serial interface data input (note 3) clock 4 serial interface clock input le 5 latch enable input (note 2) v dd 6 positive supply voltage n/c 7 not connected n/c 8 not connected v dd 9 positive supply voltage gnd 10 ground connection gnd 11 ground connection gnd 12 ground connection (note 7) v dd 13 positive supply voltage (note 8) rf out 14 rf out port (note 1) c8 15 control for attenuation bit, 8 db (note 4) c4 16 control for attenuation bit, 4 db (note 4) c2 17 control for attenuation bit, 2 db (note 4) gnd 18 ground connection c1 19 control for attenuation bit, 1 db (note 4) c0.5 20 control for attenuation bit, 0.5 db (note 4,6) gnd paddle paddle ground (note 5) notes: 1. both rf ports must be held at 0vdc or dc blocked with an external series capacitor. 2. latch enable (le) has an internal 2m : to internal positive supply voltage. 3. place a 10k : resistor in series, as close to pin as possible to avoid freq. resonance. 4. refer to power-up control settings. 5. the exposed solder pad on the bottom of the package (see pin confguration) must be grounded for proper device operation. 6. this pin has an internal 200 k ? resistor to ground. 7. ground must be less than 80 mil (0.08) from pin 12 proper device operation. 8. when vdd<=3.6v this pin may be connected directly to vdd, when 3.6v< vdd <=5.2v need to use a voltage divider to reduce voltage on this pin to a voltage in the range +1.17 to 3.6v. see application note an-70-006. 9. place a shunt 10k ? resistor to ground. parallel serial gnd gnd gnd gnd vdd vdd vdd n/c n/c rfout c8 le clock data rfin n/c c4 c2 c1 c0.5 2x2mm paddle ground 15 14 13 12 11 1 2 3 4 5 6 7 8 9 20 19 18 17 16 10 gnd gnd gnd gnd gnd vdd vdd pup2 n/c rfout c8 le gnd n/c rfin n/c c4 c2 c1 c0.5 2x2mm paddle ground 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 digital step attenuator DAT-15R5A-SP+ mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com
page 5 of 8 the serial interface is a 5-bit serial in, parallel-out shift register buffered by a transparent latch. it is controlled by three cmos-compatible signals: data, clock, and latch enable (le). the data and clock inputs allow data to be serially entered into the shift register, a process that is independent of the state of the le input. the le input controls the latch. when le is high, the latch is transparent and the contents of the serial shift register control the attenuator. when le is brought low, data in the shift register is latched. the shift register should be loaded while le is held low to prevent the attenuator value from changing as data is entered. the le input should then be toggled high and brought low again, latching the new data. the timing for this operation is defned by figure 2 (serial interface timing diagram) and table 2 (serial interface ac characteristics). simplifed schematic figure 2: serial interface timing diagram the DAT-15R5A-SP+ serial interface consists of 5 control bits that select the desired attenuation state, as shown in table 1: truth table table 1. truth table attenuation state c8 c4 c2 c1 c0.5 reference 0 0 0 0 0 0.5 (db) 0 0 0 0 1 1 (db) 0 0 0 1 0 2 (db) 0 0 1 0 0 4 (db) 0 1 0 0 0 8 (db) 1 0 0 0 0 15.5 (db) 1 1 1 1 1 note: not all 32 possible combinations of c0.5 - c8 are shown in table l e c l o c k d a t a ms b l s b t l e s u p t s d s u p t s d h l d t l e p w table 2. serial interface ac characteristics symbol parameter min. max. units f clk serial data clock frequency (note 1) 10 mhz t clkh serial clock high time 30 ns t clkl serial clock low time 30 ns t lesup le set-up time after last clock falling edge 10 ns t lepw le minimum pulse width 30 ns t sdsup serial data set-up time before clock rising edge 10 ns t sdhld serial data hold time after clock falling edge 10 ns note 1. fclk verifed during the functional pattern test. serial programming sections of the functional pattern are clocked at 10mhz to verify fclk speci - fcation. digital serial control rf input 8db 4db 2db 1db 0.5db rf out digital step attenuator DAT-15R5A-SP+ mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com
page 6 of 8 the DAT-15R5A-SP+, uses a common 5-bit serial word format, as shown in table 3 : 5-bit attenuator serial programming register map. the second bit b4 corresponds to the 8 db step and the last bit b0 corresponds to the 0.5 db step. the DAT-15R5A-SP+ always assumes a specifable attenuation setting on power-up, allowing a known attenuation state to be established before an initial serial control word is provided. when the attenuator powers up, the fve control bits are set to whatever data is present on the fve data inputs (c0.5 to c8). this allows any one of the 32 attenuation settings to be specifed as the power-up state. power-up control settings table 3. 5-bit attenuator serial programming register map b5 b4 b3 b2 b1 b0 0 c8 c4 c2 c1 c0.5 msb (frst in) lsb (last in) note: the stop bit (b5) must always be low to prevent the attenuator from entering an unknown state. digital step attenuator DAT-15R5A-SP+ mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com
page 7 of 8 tb-334 notes 1. both rf ports must be held at 0vdc or dc blocked with an external series capacitor. 2. test board tb-334 is designed for operation for vdd=2.3 to 3.6v. for operation over 3.6v to 5.2v, see application note an-70-006 3. vdd=vdd bill of materials n8, n11, n13, n14, n16-n21 resistor 0603 10 kohm +/- 1% n5, n9, n10 & n12 npo capacitor 0603 100pf +/- 5% n6 tantalum capacitor 0805 100nf +/- 10% n7 hex invert schmitt trigger msl1 fig 3. evaluation board schematic, tb-334, used for characterization (dut not soldered on tb-334) test equipment for insertion loss, isolation and return loss: agilents e5071c network analyzer & e3631a power supply. for compression: agilents n9020a signal analyzer, e8247c rf generator, e3631a power supply & u2004a power sensor. for input ip3: agilents n9020a signal analyzer, n5181a signal generators, e3631a power supply, u2004a power sensor. for spurs: agilent n5181a signal generator, e4440a spectrum analyzer. for switching time: agilents n5181a signal generator, 81110a pulse generator, 54832b oscilloscope, e3631a power supply. for max control frequency: agilents n5181a signal generator, n9020a signal analyzer, e3631a power supply, 81110a pulse generator. measurement conditions for insertion loss, isolation and return loss: vdd=+2.3/+3/+5.5v &pin=0dbm for compression: pin=0/+24dbm. vdd=+3v for input ip3: pin=+10dbm/tone. tone spacing: 0.1 mhz to 1 mhz rf freq and 1 mhz to 4200 mhz rf freq, vdd=+3v for spurs: rf in at 1000mhz and -20dbm. vdd=+3v for switching time: rf freq=501mhz/0dbm, pulse for le=1hz/0/+3.4v, delay=500ms, width=500ms. vdd=+3v for max control frequency: rf freq=501mhz, 0dbm. vdd=+3v digital step attenuator DAT-15R5A-SP+ mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com
page 8 of 8 esd rating human body model (hbm): class 1c (1000 to <2000v) in accordance with mil-std-883 method 3015 msl rating moisture sensitivity: msl1 in accordance with ipc/jedec j-std-020d performance data data table swept graphs s-parameter (s2p files) data set (.zip fle) case style dg983-2 plastic package, exposed paddle, lead fnish: nipdau tape & reel f87 standard quantities available on reel 7 reels with 20, 50, 100 or 200 devices 13 reels with 3k devices suggested layout for pcb design pl-199 evaluation board tb-334 environmental ratings env33t1 additional detailed technical information additional information is available on our dash board. to access this information click here msl test flow chart additional notes a. performance and quality attributes and conditions not expressly stated in this specifcation document are intended to be excluded and do not form a part of this specifcation document. b. electrical specifcations and performance data contained in this specifcation document are based on mini-circuits applicable established test performance criteria and measurement instructions. c. the parts covered by this specifcation document are subject to mini-circuits standard limited warranty and terms and conditions (collectively, standard terms); purchasers of this part are entitled to the rights and benefts contained therein. for a full statement of the standard terms and the exclusive rights and remedies thereunder, please visit mini-circuits website at www.minicircuits.com/mclstore/terms.jsp visual inspection electrical test sam analysis refow 3 cycles, 260c soak 85c/85rh 168 hours bake at 125c, 24 hours visual inspection electrical test sam analysis start finish digital step attenuator DAT-15R5A-SP+ mini-circuits ? www.minicircuits.com p.o. box 350166, brooklyn, ny 11235-0003 (718) 934-4500 sales@minicircuits.com
|
